Nacif, José Augusto MirandaSilva, ThiagoTavares, Andréa IabrudiFernandes, Antônio OtávioCoelho Júnior, Claudionor José Nunes2012-11-122012-11-122008NACIF, J. A. M. et al. Efficient allocation of verification resources using revision history information. In.IEEE Workshop on Design and Diagnostics of Electronic Systems,11,. 2008, Bratislava. Anais... Bratislava: Workshop on Design and Diagnostics of Electronic Systems, 2008.Disponível em: <http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4538784>. Acesso em: 12 nov. 2012http://www.repositorio.ufop.br/handle/123456789/1767Verifying large industrial designs is getting harder each day. he current verification methodologies are not able to guarantee bug free designs. Some recurrent questions during a design verification are: Which modules are most likely to contain undetected bugs? In wich modules the verification team should concentrate their effort? This information is very useful, because it is better to start verifying the most bug-prone modules. In this work we present a novel approach to answer these questions. In order to identify these bug rone modules the revision history of the design is used. Using information of an academic experiment, we demonstrate that there is a close between bugs/changes history and future bugs. Our results show that allocating modules for verification based on bugs/changes leaded to the coverage of 91.67% of future bugs, while random based strategy covered only 37.5% of the future work mainly focused in software engineering techniques to bugs.en-USTrabalho apresentado em evento